Lines Matching refs:values
436 const display_mode *mode, const pll_dividers *dividers, pll_regs *values )
438 values->dot_clock_freq = dividers->freq;
439 values->feedback_div = dividers->feedback;
440 values->post_div = dividers->post;
441 values->pll_output_freq = dividers->freq * dividers->post;
443 values->ppll_ref_div = dividers->ref;
444 values->ppll_div_3 = (dividers->feedback | (dividers->post_code << 16));
446 values->htotal_cntl = mode->timing.h_total & 7;
449 values->dot_clock_freq, values->pll_output_freq,
450 values->ppll_ref_div, values->feedback_div, values->post_div );
453 // write values into PLL registers
455 accelerator_info *ai, int crtc_idx, pll_regs *values )
489 values->ppll_ref_div << RADEON_PPLL_REF_DIV_ACC_SHIFT,
494 values->ppll_ref_div,
500 values->ppll_div_3,
505 values->ppll_div_3,
513 values->htotal_cntl );