Lines Matching defs:mode
213 const display_mode *mode, uint32 max_v_tweak, uint32 max_h_tweak,
234 uint32 v_total = mode->timing.v_total + v_tweak * v_tweak_dir;
242 uint32 h_total = mode->timing.h_total + h_tweak * h_tweak_dir;
406 // mode->timing.pixel_clock must be in Hz because required accuracy in TV-Out mode
408 const general_pll_info *general_pll, const display_mode *mode, pll_dividers *dividers )
426 SHOW_FLOW( 2, "freq=%ld", mode->timing.pixel_clock );
428 Radeon_CalcPLLDividers( &pll, mode->timing.pixel_clock, 0, dividers );
433 // mode->timing.pixel_clock must be in Hz because required accuracy in TV-Out mode
436 const display_mode *mode, const pll_dividers *dividers, pll_regs *values )
446 values->htotal_cntl = mode->timing.h_total & 7;