Lines Matching defs:mode
70 display_mode *mode, crtc_regs *values )
81 // here, we should set interlace/double scan mode
91 | ((mode->timing.flags & B_TIMING_INTERLACED)
96 ((mode->timing.h_total / 8 - 1) & RADEON_CRTC_H_TOTAL)
97 | (((mode->timing.h_display / 8 - 1) << RADEON_CRTC_H_DISP_SHIFT) & RADEON_CRTC_H_DISP);
99 hsync_wid = (mode->timing.h_sync_end - mode->timing.h_sync_start) / 8;
101 hsync_start = mode->timing.h_sync_start - 8 + hsync_fudge;
106 | ((mode->flags & B_POSITIVE_HSYNC) == 0 ? RADEON_CRTC_H_SYNC_POL : 0);
109 ((mode->timing.v_total - 1) & RADEON_CRTC_V_TOTAL)
110 | (((mode->timing.v_display - 1) << RADEON_CRTC_V_DISP_SHIFT) & RADEON_CRTC_V_DISP);
112 vsync_wid = mode->timing.v_sync_end - mode->timing.v_sync_start;
115 ((mode->timing.v_sync_start - 1) & RADEON_CRTC_V_SYNC_STRT)
117 | ((mode->flags & B_POSITIVE_VSYNC) == 0
122 values->crtc_pitch = Radeon_RoundVWidth( mode->virtual_width, vc->bpp ) / 8;
136 offset = (vc->mode.v_display_start + crtc->rel_y) * vc->pitch +
137 (vc->mode.h_display_start + crtc->rel_x) * vc->bpp +
155 if( h_display_start + vc->eff_width > vc->mode.virtual_width ||
156 v_display_start + vc->eff_height > vc->mode.virtual_height )
160 vc->mode.h_display_start = h_display_start & ~7;
161 vc->mode.v_display_start = v_display_start;