Lines Matching refs:buffer
55 uint8 buffer[21];
74 memcpy(&buffer[2], &BtNtscMacro0, 19);
79 memcpy(&buffer[2], &BtNtscMacro1, 19);
84 memcpy(&buffer[2], &BtNtscMacro2, 19);
89 memcpy(&buffer[2], &BtNtscMacro3, 19);
100 memcpy(&buffer[2], &BtPalMacro0, 19);
107 memcpy(&buffer[2], &BtPalMacro1, 19);
113 buffer[0] = si->ps.tv_encoder.adress + WR;
115 buffer[1] = 0xda;
121 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
137 uint8 buffer[3];
139 buffer[0] = adress + WR;
145 buffer[1] = 0xc4;
149 buffer[2] = 0x01;
156 i2c_writebuffer(bus, buffer, sizeof(buffer));
165 uint8 buffer[3];
169 buffer[0] = si->ps.tv_encoder.adress + WR;
171 buffer[1] = 0x6c;
173 buffer[2] = 0x02;
179 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
287 uint8 buffer[35];
291 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
292 buffer[1] = 0x76; //select first bt register to write to
293 buffer[2] = 0x60;
294 buffer[3] = 0x80;
295 buffer[4] = 0x8a;
296 buffer[5] = 0xa6;
297 buffer[6] = 0x68;
298 buffer[7] = 0xc1;
299 buffer[8] = 0x2e;
300 buffer[9] = 0xf2;
301 buffer[10] = 0x27;
302 buffer[11] = 0x00;
303 buffer[12] = 0xb0;
304 buffer[13] = 0x0a;
305 buffer[14] = 0x0b;
306 buffer[15] = 0x71;
307 buffer[16] = 0x5a;
308 buffer[17] = 0xe0;
309 buffer[18] = 0x36;
310 buffer[19] = 0x00;
311 buffer[20] = 0x50;
312 buffer[21] = 0x72;
313 buffer[22] = 0x1c;
314 buffer[23] = 0x8d; //chip-pin CLKI is pixel clock (only non-default here!)
315 buffer[24] = 0x24;
316 buffer[25] = 0xf0;
317 buffer[26] = 0x58;
318 buffer[27] = 0x81;
319 buffer[28] = 0x49;
320 buffer[29] = 0x8c;
321 buffer[30] = 0x0c;
322 buffer[31] = 0x8c;
323 buffer[32] = 0x79;
324 buffer[33] = 0x26;
325 buffer[34] = 0x00;
331 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
345 uint8 buffer[35];
349 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
350 buffer[1] = 0x76; //select first bt register to write to
351 buffer[2] = 0x00;
352 buffer[3] = 0x20;
353 buffer[4] = 0xaa;
354 buffer[5] = 0xca;
355 buffer[6] = 0x9a;
356 buffer[7] = 0x0d;
357 buffer[8] = 0x29;
358 buffer[9] = 0xfc;
359 buffer[10] = 0x39;
360 buffer[11] = 0x00;
361 buffer[12] = 0xc0;
362 buffer[13] = 0x8c;
363 buffer[14] = 0x03;
364 buffer[15] = 0xee;
365 buffer[16] = 0x5f;
366 buffer[17] = 0x58;
367 buffer[18] = 0x3a;
368 buffer[19] = 0x66;
369 buffer[20] = 0x96;
370 buffer[21] = 0x00;
371 buffer[22] = 0x00;
372 buffer[23] = 0x90; //chip-pin CLKI is pixel clock (only non-default here!)
373 buffer[24] = 0x24;
374 buffer[25] = 0xf0;
375 buffer[26] = 0x57;
376 buffer[27] = 0x80;
377 buffer[28] = 0x48;
378 buffer[29] = 0x8c;
379 buffer[30] = 0x18;
380 buffer[31] = 0x28;
381 buffer[32] = 0x87;
382 buffer[33] = 0x1f;
383 buffer[34] = 0x00;
389 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
403 uint8 buffer[35];
407 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
408 buffer[1] = 0x76; //select first bt register to write to
409 buffer[2] = 0x00;
410 buffer[3] = 0x80;
411 buffer[4] = 0x84;
412 buffer[5] = 0x96;
413 buffer[6] = 0x60;
414 buffer[7] = 0x7d;
415 buffer[8] = 0x22;
416 buffer[9] = 0xd4;
417 buffer[10] = 0x27;
418 buffer[11] = 0x00;
419 buffer[12] = 0x10;
420 buffer[13] = 0x7e;
421 buffer[14] = 0x03;
422 buffer[15] = 0x58;
423 buffer[16] = 0x4b;
424 buffer[17] = 0xe0;
425 buffer[18] = 0x36;
426 buffer[19] = 0x92;
427 buffer[20] = 0x54;
428 buffer[21] = 0x0e;
429 buffer[22] = 0x88;
430 buffer[23] = 0x8c; //chip-pin CLKI is pixel clock (only non-default here!)
431 buffer[24] = 0x0a;
432 buffer[25] = 0xe5;
433 buffer[26] = 0x76;
434 buffer[27] = 0x79;
435 buffer[28] = 0x44;
436 buffer[29] = 0x85;
437 buffer[30] = 0x00;
438 buffer[31] = 0x00;
439 buffer[32] = 0x80;
440 buffer[33] = 0x20;
441 buffer[34] = 0x00;
447 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
461 uint8 buffer[35];
465 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
466 buffer[1] = 0x76; //select first bt register to write to
467 buffer[2] = 0xa0;
468 buffer[3] = 0x20;
469 buffer[4] = 0xb6;
470 buffer[5] = 0xce;
471 buffer[6] = 0x84;
472 buffer[7] = 0x55;
473 buffer[8] = 0x20;
474 buffer[9] = 0xd8;
475 buffer[10] = 0x39;
476 buffer[11] = 0x00;
477 buffer[12] = 0x70;
478 buffer[13] = 0x42;
479 buffer[14] = 0x03;
480 buffer[15] = 0xdf;
481 buffer[16] = 0x56;
482 buffer[17] = 0x58;
483 buffer[18] = 0x3a;
484 buffer[19] = 0xcd;
485 buffer[20] = 0x9c;
486 buffer[21] = 0x14;
487 buffer[22] = 0x3b;
488 buffer[23] = 0x91; //chip-pin CLKI is pixel clock (only non-default here!)
489 buffer[24] = 0x0a;
490 buffer[25] = 0xe5;
491 buffer[26] = 0x74;
492 buffer[27] = 0x77;
493 buffer[28] = 0x43;
494 buffer[29] = 0x85;
495 buffer[30] = 0xba;
496 buffer[31] = 0xe8;
497 buffer[32] = 0xa2;
498 buffer[33] = 0x17;
499 buffer[34] = 0x00;
505 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
519 uint8 buffer[35];
523 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
524 buffer[1] = 0x76; //select first bt register to write to
525 buffer[2] = 0xf0;
526 buffer[3] = 0xd0;
527 buffer[4] = 0x82;
528 buffer[5] = 0x9c;
529 buffer[6] = 0x5a;
530 buffer[7] = 0x31;
531 buffer[8] = 0x16;
532 buffer[9] = 0x22;
533 buffer[10] = 0xa6;
534 buffer[11] = 0x00;
535 buffer[12] = 0x78;
536 buffer[13] = 0x93;
537 buffer[14] = 0x03;
538 buffer[15] = 0x71;
539 buffer[16] = 0x2a;
540 buffer[17] = 0x40;
541 buffer[18] = 0x0a;
542 buffer[19] = 0x00;
543 buffer[20] = 0x50;
544 buffer[21] = 0x55;
545 buffer[22] = 0x55;
546 buffer[23] = 0x8c; //chip-pin CLKI is pixel clock (only non-default here!)
547 buffer[24] = 0x24;
548 buffer[25] = 0xf0;
549 buffer[26] = 0x59;
550 buffer[27] = 0x82;
551 buffer[28] = 0x49;
552 buffer[29] = 0x8c;
553 buffer[30] = 0x8e;
554 buffer[31] = 0xb0;
555 buffer[32] = 0xe6;
556 buffer[33] = 0x28;
557 buffer[34] = 0x00;
563 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
577 uint8 buffer[35];
581 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
582 buffer[1] = 0x76; //select first bt register to write to.
583 buffer[2] = 0xf0; //lsb h_clk_o: overscan comp = 0, so h_clk_o = 2 * h_clk_i (VSR=2 = scaling=1)
584 buffer[3] = 0xd0; //lsb h_active: h_active = 720 pixels wide port
585 buffer[4] = 0x83; //scope: OK hsync_width: (hsync_width / h_clk_o) * 63.55556uS = 4.70uS for NTSC
586 buffer[5] = 0x98; //scope: OK hburst_begin: (hburst_begin / h_clk_o) * 63.55556uS = 5.3uS for NTSC
587 buffer[6] = 0x5e; //scope: OK hburst_end: ((hburst_end + 128) / h_clk_o) * 63.55556uS = 7.94uS for NTSC
602 buffer[7] = 0x0c; //scope: tuned. lsb h_blank_o: h_blank_o = horizontal viewport location on TV
608 buffer[7] = 0x28; //scope: tuned. lsb h_blank_o: h_blank_o = horizontal viewport location on TV
611 buffer[8] = 0x18; //try-out; scope: checked against other modes, looks OK. v_blank_o: 1e active line ('pixel')
613 buffer[9] = 0xf2; //v_active_o: = (active output lines + 2) / field (on TV)
614 buffer[10] = 0x26; //lsn = msn h_clk_o;
617 buffer[11] = 0x00; //h_fract is always 0.
618 buffer[12] = 0x78; //lsb h_clk_i: h_clk_i is horizontal total = 888.
619 buffer[13] = 0x90; //try-out; lsb h_blank_i: #clks between start sync and new line 1st pixel; copy to VGA delta-sync!
620 buffer[14] = 0x03; //b2-0 = msn h_clk_i;
623 buffer[15] = 0x0d; //lsb v_lines_i: v_lines_i = 525
624 buffer[16] = 0x1a; //try-out; v_blank_i: #input lines between start sync and new line (pixel); copy to VGA delta-sync!
626 buffer[17] = 0xe0; //lsb v_active_i: v_active_i = 480
627 buffer[18] = 0x36; //b1-0 = msn v_lines_i;
631 buffer[19] = 0x00; //lsb v_scale: v_scale = off = $1000
632 buffer[20] = 0x50; //b5-0 = msn v_scale;
635 buffer[21] = 0x98; //lsb PLL fract: PLL fract = 0x6e98
636 buffer[22] = 0x6e; //msb PLL fract
637 buffer[23] = 0x8c; //b5-0 = PLL int: PLL int = 0x0c;
640 buffer[24] = 0x0a; //b0 = ni_out is always 0;
648 buffer[25] = 0xe5; //sync_amp $e5 for NTSC
649 buffer[26] = 0x75; //bst_amp $74-$76 for NTSC
650 buffer[27] = 0x78; //mcr: r-y $77-$79 for NTSC
651 buffer[28] = 0x44; //mcb: b-y $43-$44 for NTSC
652 buffer[29] = 0x85; //my: y $85 for NTSC
653 buffer[30] = 0x3c; //lsb msc: msc b31-0: NTSC formula: ((3579545 / pixelclk) * 2^32) = MSC
654 buffer[31] = 0x91; //msc = $20c2913c
655 buffer[32] = 0xc2;
656 buffer[33] = 0x20; //msb msc.
657 buffer[34] = 0x00; //phase_off always $00
663 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
677 uint8 buffer[35];
681 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
682 buffer[1] = 0x76; //select first bt register to write to.
683 buffer[2] = 0x60; //lsb h_clk_o: overscan comp = 0, so h_clk_o = 2 * h_clk_i (VSR=2 = scaling=1)
684 buffer[3] = 0x20; //lsb h_active: h_active = 800 pixels wide port
685 buffer[4] = 0x8b; //scope: OK hsync_width: (hsync_width / h_clk_o) * 64.0uS = 4.70uS for PAL
686 buffer[5] = 0xa5; //scope: OK hburst_begin: (hburst_begin / h_clk_o) * 64.0uS = 5.6uS for PAL
687 buffer[6] = 0x6b; //scope: OK hburst_end: ((hburst_end + 128) / h_clk_o) * 64.0uS = 7.97uS for PAL
702 buffer[7] = 0xf0;
703 buffer[8] = 0x17;
708 buffer[7] = 0xd0;//scope: tuned. lsb h_blank_o: h_blank_o = horizontal viewport location on TV
710 buffer[8] = 0x18;//try-out; scope: checked against other modes, looks OK. v_blank_o: 1e active line ('pixel')
713 buffer[9] = 0x2e; //v_active_o: = (active output lines + 2) / field (on TV)
714 buffer[10] = 0xb7; //lsn = msn h_clk_o;
717 buffer[11] = 0x00; //h_fract is always 0.
718 buffer[12] = 0xb0; //lsb h_clk_i: h_clk_i is horizontal total = 944.
721 buffer[13] = 0x20;
723 buffer[13] = 0x14;//try-out; lsb h_blank_i: #clks between start sync and new line 1st pixel; copy to VGA delta-sync!
725 buffer[14] = 0x03; //b2-0 = msn h_clk_i;
728 buffer[15] = 0x71; //lsb v_lines_i: v_lines_i = 625
731 buffer[16] = 0x08;
733 buffer[16] = 0x2a;//try-out; v_blank_i: #input lines between start sync and new line (pixel); copy to VGA delta-sync!
736 buffer[17] = 0x58; //lsb v_active_i: v_active_i = 600
737 buffer[18] = 0x3a; //b1-0 = msn v_lines_i;
741 buffer[19] = 0x00; //lsb v_scale: v_scale = off = $1000
742 buffer[20] = 0x10; //b5-0 = msn v_scale;
745 buffer[21] = 0x72; //lsb PLL fract: PLL fract = 0x1c72
746 buffer[22] = 0x1c; //msb PLL fract
747 buffer[23] = 0x8d; //b5-0 = PLL int: PLL int = 0x0d;
750 buffer[24] = 0x24; //b0 = ni_out is always 0;
758 buffer[25] = 0xf0; //sync_amp $f0 for PAL
759 buffer[26] = 0x57; //bst_amp $57-$58 for PAL
760 buffer[27] = 0x80; //mcr: r-y $80-$81 for PAL
761 buffer[28] = 0x48; //mcb: b-y $48-$49 for PAL
762 buffer[29] = 0x8c; //my: y $8c for PAL
763 buffer[30] = 0x31; //lsb msc: msc b31-0: PAL formula: ((4433619 / pixelclk) * 2^32) = MSC
764 buffer[31] = 0x8c; //msc = $26798c31
765 buffer[32] = 0x79;
766 buffer[33] = 0x26; //msb msc.
767 buffer[34] = 0x00; //phase_off always $00
773 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
787 uint8 buffer[35];
791 buffer[0] = si->ps.tv_encoder.adress + WR; //issue I2C write command
792 buffer[1] = 0x76; //select first bt register to write to.
793 buffer[2] = 0x20; //lsb h_clk_o: overscan comp = 0, so h_clk_o = 2 * h_clk_i (VSR=2 = scaling=1)
794 buffer[3] = 0x80; //lsb h_active: h_active = 640 pixels wide port
795 buffer[4] = 0x74; //scope: OK hsync_width: (hsync_width / h_clk_o) * 63.55556uS = 4.70uS for NTSC
796 buffer[5] = 0x83; //scope: OK hburst_begin: (hburst_begin / h_clk_o) * 63.55556uS = 5.3uS for NTSC
797 buffer[6] = 0x44; //scope: OK hburst_end: ((hburst_end + 128) / h_clk_o) * 63.55556uS = 7.94uS for NTSC
809 buffer[7] = 0xf7; //scope: tuned. lsb h_blank_o: h_blank_o = horizontal viewport location on TV:
813 buffer[8] = 0x1d;
815 buffer[8] = 0x1c;//try-out; scope: checked against other modes, looks OK. v_blank_o: 1e active line ('pixel')
817 buffer[9] = 0xf2; //v_active_o: = (active output lines + 2) / field (on TV)
818 buffer[10] = 0x26; //lsn = msn h_clk_o;
821 buffer[11] = 0x00; //h_fract is always 0.
822 buffer[12] = 0x10; //lsb h_clk_i: h_clk_i is horizontal total = 784.
823 buffer[13] = 0x14; //try-out; lsb h_blank_i: #clks between start sync and new line 1st pixel; copy to VGA delta-sync!
824 buffer[14] = 0x03; //b2-0 = msn h_clk_i;
827 buffer[15] = 0x0d; //lsb v_lines_i: v_lines_i = 525
828 buffer[16] = 0x18; //try-out; v_blank_i: #input lines between start sync and new line (pixel); copy to VGA delta-sync!
830 buffer[17] = 0xe0; //lsb v_active_i: v_active_i = 480
831 buffer[18] = 0x36; //b1-0 = msn v_lines_i;
835 buffer[19] = 0x00; //lsb v_scale: v_scale = off = $1000
836 buffer[20] = 0x10; //b5-0 = msn v_scale;
839 buffer[21] = 0xdb; //lsb PLL fract: PLL fract = 0xf9db
840 buffer[22] = 0xf9; //msb PLL fract
841 buffer[23] = 0x8a; //b5-0 = PLL int: PLL int = 0x0a;
844 buffer[24] = 0x0a; //b0 = ni_out is always 0;
852 buffer[25] = 0xe5; //sync_amp $e5 for NTSC
853 buffer[26] = 0x75; //bst_amp $74-$76 for NTSC
854 buffer[27] = 0x78; //mcr: r-y $77-$79 for NTSC
855 buffer[28] = 0x44; //mcb: b-y $43-$44 for NTSC
856 buffer[29] = 0x85; //my: y $85 for NTSC
857 buffer[30] = 0x37; //lsb msc: msc b31-0: NTSC formula: ((3579545 / pixelclk) * 2^32) = MSC
858 buffer[31] = 0x12; //msc = $251b1237
859 buffer[32] = 0x1b;
860 buffer[33] = 0x25; //msb msc.
861 buffer[34] = 0x00; //phase_off always $00
867 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
881 uint8 buffer[3];
885 buffer[0] = si->ps.tv_encoder.adress + WR;
887 buffer[1] = 0xc4;
889 buffer[2] = 0x05;
895 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
909 uint8 buffer[7];
911 buffer[0] = si->ps.tv_encoder.adress + WR;
913 buffer[1] = 0xc6;
915 buffer[2] = 0x98;
917 buffer[3] = 0x98;
921 buffer[3] = 0xc0;
928 buffer[4] = 0xc0;
930 buffer[5] = 0xc0;
947 buffer[6] = 0x18; // Y/C and CVBS out if all ports implemented
952 buffer[6] = 0x00; // put CVBS on all outputs. Used for cards
960 buffer[6] = 0x00; //only Y connected: must be CVBS!
964 buffer[6] = 0x00; //only C connected: must be CVBS!
968 buffer[6] = 0x00; //CVBS and only Y connected: 2x CVBS!
972 buffer[6] = 0x00; //CVBS and only C connected: 2x CVBS!
976 buffer[6] = 0x18; //nothing, or
988 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1002 uint8 buffer[7];
1010 buffer[0] = si->ps.tv_encoder.adress + WR;
1012 buffer[1] = 0x6c;
1014 buffer[2] = 0x86;
1016 buffer[3] = 0x00; //set default horizontal sync offset
1017 buffer[4] = 0x02; //set default horizontal sync width
1018 buffer[5] = 0x00; //set default vertical sync offset
1048 buffer[3] = (0x1e + hoffset); //set horizontal sync offset
1052 buffer[3] = (0xe1 + hoffset); //set horizontal sync offset
1053 buffer[4] = 0xc2;
1055 buffer[5] = 0x40; //set VSync offset (on BT's only)
1059 buffer[3] = (0xa8 + hoffset);
1064 buffer[3] = (0x2c + hoffset);
1068 buffer[3] = (0xb2 + hoffset); //set horizontal sync offset CX
1070 buffer[3] = (0xd0 + hoffset); //set horizontal sync offset BT
1071 buffer[4] = 0xff; //hsync width = max:
1074 buffer[3] = (0xd4 + hoffset);
1075 buffer[4] = 0xff;
1078 buffer[3] = (0xc8 + hoffset);
1079 buffer[4] = 0xff;
1083 buffer[3] = (0x78 + hoffset); //set horizontal sync offset CX
1085 buffer[3] = (0xc4 + hoffset); //set horizontal sync offset BT
1086 buffer[4] = 0xff;
1092 buffer[6] = 0x01; //set default vertical sync width
1098 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1111 uint8 buffer[3];
1119 buffer[0] = si->ps.tv_encoder.adress + WR;
1121 buffer[1] = 0xc4;
1123 buffer[2] = 0x41;
1129 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1140 buffer[0] = si->ps.tv_encoder.adress + WR;
1142 buffer[1] = 0xba;
1144 buffer[2] = 0x40;
1147 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1163 buffer[0] = si->ps.tv_encoder.adress + RD;
1167 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, 1);
1172 buffer[0] = 1;
1173 i2c_readbuffer(si->ps.tv_encoder.bus, buffer, 1);
1183 *monstat = ((buffer[0] & 0xe0) >> 5);
1187 buffer[0] = si->ps.tv_encoder.adress + WR;
1189 buffer[1] = 0xba;
1191 buffer[2] = 0x00;
1194 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1211 uint8 buffer[4];
1229 buffer[0] = si->ps.tv_encoder.adress + WR;
1231 buffer[1] = 0xa0;
1233 buffer[2] = 0x00;
1236 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, 3);
1249 buffer[0] = si->ps.tv_encoder.adress + WR;
1251 buffer[1] = 0x6c;
1253 buffer[2] = 0x02;
1256 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, 3);
1268 buffer[0] = si->ps.tv_encoder.adress + WR;
1270 buffer[1] = 0xc4;
1272 buffer[2] = 0x01;
1274 buffer[3] = 0x18;
1277 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, sizeof(buffer));
1294 uint8 buffer[3];
1302 buffer[0] = si->ps.tv_encoder.adress + WR;
1304 buffer[1] = 0xba;
1308 buffer[2] = 0x00;
1314 buffer[2] = 0x10;
1319 i2c_writebuffer(si->ps.tv_encoder.bus, buffer, 3);