Lines Matching defs:mode

23 static void SetClockRegisters(const DisplayModeEx& mode)
31 uint32 pixelClock = mode.timing.pixel_clock;
100 if (mode.timing.h_display == 1440 && pixelClock < 108000)
107 // Temporarily switch to accelerator mode.
152 SetDSPRegisters(const DisplayModeEx& mode)
166 divider *= ((mode.bitsPerPixel + 1) / 4);
225 SetCrtcRegisters(const DisplayModeEx& mode)
227 // Calculate the CRTC register values for requested video mode, and then set
232 uint32 crtc_h_total_disp = ((mode.timing.h_total / 8) - 1)
233 | (((mode.timing.h_display / 8) - 1) << 16);
235 int hSyncWidth = (mode.timing.h_sync_end - mode.timing.h_sync_start) / 8;
239 int hSyncStart = mode.timing.h_sync_start / 8 - 1;
243 | ((mode.timing.flags & B_POSITIVE_HSYNC) ? 0 : CRTC_H_SYNC_NEG);
245 uint32 crtc_v_total_disp = ((mode.timing.v_total - 1)
246 | ((mode.timing.v_display - 1) << 16));
248 int vSyncWidth = mode.timing.v_sync_end - mode.timing.v_sync_start;
252 uint32 crtc_v_sync_strt_wid = (mode.timing.v_sync_start - 1)
254 | ((mode.timing.flags & B_POSITIVE_VSYNC) ? 0 : CRTC_V_SYNC_NEG);
256 uint32 crtc_off_pitch = SetBits(mode.timing.h_display >> 3, CRTC_PITCH);
270 switch (mode.bitsPerPixel) {
284 TRACE("Undefined color depth, bitsPerPixel: %d\n", mode.bitsPerPixel);
320 Mach64_SetDisplayMode(const DisplayModeEx& mode)
324 // and assume that the mode values we get here are acceptable.
331 SetCrtcRegisters(mode);
332 SetClockRegisters(mode);
335 SetDSPRegisters(mode);
340 uint16 vesaMode = GetVesaModeNumber(display_mode(mode), mode.bitsPerPixel);
350 Mach64_AdjustFrame(mode);
365 Mach64_EngineInit(mode);
373 Mach64_AdjustFrame(const DisplayModeEx& mode)
379 int address = (mode.v_display_start * mode.virtual_width
380 + mode.h_display_start) * ((mode.bitsPerPixel + 1) / 8);
393 // Set the indexed color palette for 8-bit color depth mode.