Lines Matching defs:pseudo

76 /* Indicates error if a pseudo operation was expanded after a branch.  */
79 /* If true, then warn if any pseudo operations were expanded. */
137 /* Temporary register used when expanding assembler pseudo operations. */
169 as_bad (_("Unknown temporary pseudo register"));
173 as_bad (_("Unknown temporary pseudo register"));
264 struct i860_it pseudo[3];
272 /* Check for expandable flag to produce pseudo-instructions. This
279 pseudo[i] = the_insn;
297 pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
298 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
301 pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000
303 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
316 pseudo[0].opcode = 0xec000000 | (the_insn.opcode & 0x03e00000)
318 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_HA);
322 pseudo[1].opcode = (the_insn.opcode & ~0x03e00000) | (atmp << 21);
323 pseudo[1].fi[0].fup = the_insn.fi[0].fup | OP_SEL_L;
336 pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000
338 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
341 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000
343 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
356 pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000
358 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
359 pseudo[0].fi[0].exp.X_add_number =
363 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000
365 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
366 pseudo[1].fi[0].exp.X_add_number =
380 pseudo[0].opcode = 0xec000000 | (atmp << 16);
381 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
384 pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
385 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
388 pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
389 pseudo[2].fi[0].fup = OP_IMM_S16;
398 the_insn = pseudo[0];
446 the_insn = pseudo[++i];
1191 -mwarn-expand warn if pseudo operations are expanded\n\