config/i386/i386.c

4 This file is part of GCC.
2410 /* Register class used for passing given 64bit part of the argument.
4109      extra 80bit precision of temporaries is considered to be part of ABI.
13492      Following code reloads only the invalid part of the
13626   /* Address override works only on the (%reg) part of %fs:(%reg).  */
18522    REGNO as a part of address expression.  */
19752   /* Force this value into the low part of a fp vector constant.  */
23005   rtx part[2][4];
23043   nparts = ix86_split_to_parts (operands[1], part[1], GET_MODE (operands[0]));
23044   ix86_split_to_parts (operands[0], part[0], GET_MODE (operands[0]));
23050       rtx src_base = XEXP (part[1][nparts - 1], 0);
23060 	part[1][i] = change_address (part[1][i],
23061 				     GET_MODE (part[1][i]), src_base);
23066   if (REG_P (part[0][0]) && MEM_P (part[1][0]))
23073 	    = reg_overlap_mentioned_p (part[0][i], XEXP (part[1][0], 0));
23078       /* Collision in the middle part can be handled by reordering.  */
23081 	  std::swap (part[0][1], part[0][2]);
23082 	  std::swap (part[1][1], part[1][2]);
23090 	      std::swap (part[0][1], part[0][2]);
23091 	      std::swap (part[1][1], part[1][2]);
23095 	      std::swap (part[0][2], part[0][3]);
23096 	      std::swap (part[1][2], part[1][3]);
23101 	 Do an lea to the last part and use only one colliding move.  */
23108 	  base = part[0][nparts - 1];
23110 	  /* Handle the case when the last part isn't valid for lea.
23115 	  addr = XEXP (part[1][0], 0);
23154 	  part[1][0] = replace_equiv_address (part[1][0], base);
23160 	      part[1][i] = replace_equiv_address (part[1][i], tmp);
23174 	      emit_move_insn (part[0][2], part[1][2]);
23178 	      emit_move_insn (part[0][3], part[1][3]);
23179 	      emit_move_insn (part[0][2], part[1][2]);
23188 	  if (GET_MODE (part[1][1]) == SImode)
23190 	      switch (GET_CODE (part[1][1]))
23193 		  part[1][1] = adjust_address (part[1][1], DImode, 0);
23197 		  part[1][1] = gen_rtx_REG (DImode, REGNO (part[1][1]));
23204 	      if (GET_MODE (part[1][0]) == SImode)
23205 		part[1][0] = part[1][1];
23208       emit_move_insn (part[0][1], part[1][1]);
23209       emit_move_insn (part[0][0], part[1][0]);
23214   if ((REG_P (part[0][0])
23215        && REG_P (part[1][1])
23216        && (REGNO (part[0][0]) == REGNO (part[1][1])
23218 	       && REGNO (part[0][0]) == REGNO (part[1][2]))
23220 	       && REGNO (part[0][0]) == REGNO (part[1][3]))))
23222 	  && reg_overlap_mentioned_p (part[0][0], XEXP (part[1][0], 0))))
23226 	  operands[2 + i] = part[0][j];
23227 	  operands[6 + i] = part[1][j];
23234 	  operands[2 + i] = part[0][i];
23235 	  operands[6 + i] = part[1][i];
41406          a 128-bit lane.  First fill the second part of the mask,
47380    which requires that the high and low part shuffle be identical; the
48050   /* We can pblend the part where elements stay not in their
48062   /* First we apply one operand permutation to the part where
51582   /* Vector part.  */
51591   /* Scalar part.  */