config/aarch64/aarch64.c

177 /* The processor for which instructions should be scheduled.  */
183 /* Mask to specify which instructions we are allowed to generate.  */
186 /* Mask to specify which instruction scheduling options should be used.  */
1552   /* Arguments which are variable sized or larger than 2 registers are
1643    Return true if REGNO is the number of a hard register in which the values
2555    This function checks whether the callee saved stack is empty, which
2773   /* If FP is not needed, we calculate the location of LR, which would be
2786    instructions which would be emitted.  GENERATE inhibits or
3183      hard frame pointer, both of which are usually valid base registers.
4965      SP+constant->FP_REGS.  We cannot support such operations which
5074 /* Return size in bits of an arithmetic operand which is shifted/scaled and
5186    a MULT, which may be part of a multiply-accumulate rtx.  Return
5275 	     which case FNMUL is different than FMUL with operand negation.  */
5316 	  /* This is a CONST or SYMBOL ref which will be split
5634 	 The exception is constant 0, which can be expressed
5636 	 if we have (set (reg) (const0_rtx)) in which case we must cost
5669 	       or MOV v0.s[0], wzr - neither of which are modeled by the
6367 	     (scalar), which we don't model.  */
6870   /* The compiler may have been configured with 2.23.* binutils, which does
7152      constants which are not to SFmode or DFmode registers.  */
7314   /* Emit code to initialize STACK, which points to the next varargs stack
7878    types, which are GCC extensions and out of the scope of AAPCS64, are
8136    for which we hold recog_data.  */
8537    which select one half of the vector.  An instruction selecting
8654    COUNT is the number of components into which the copy needs to be
8769 /* Generate code to load VALS, which is a PARALLEL containing only
8914      part of a COMDAT groups, in which case GAS requires the full
9319 /* We can only represent floating point constants which will fit in
9613      (but not which vector).  */
10136   int i, nelt, which;
10147   for (i = which = 0; i < nelt; ++i)
10151       which |= (ei < nelt ? 1 : 2);
10155   switch (which)
10191   unsigned int i, nelt, which;
10200   for (i = which = 0; i < nelt; ++i)
10204       which |= (e < nelt ? 1 : 2);
10209   if (which == 2)
10214   d.one_vector_p = (which != 3);
10802       /* FIXME: this misses some which is considered simple arthematic
11181    which should be applied to all memory operands, it's SIGN_EXTEND,