binutils/opcodes/mips-dis.c

5    This file is part of the GNU opcodes library.
7    This library is free software; you can redistribute it and/or modify
12    It is distributed in the hope that it will be useful, but WITHOUT
28 /* FIXME: These are needed to figure out if the code is mips16 or
29    not. The low bit of the address is often a good indicator.  No
30    symbol table is available when this code runs out in an embedded
31    system as when it is used for disassembler support in a monitor.  */
652   /* XLP is mostly like XLR, with the prominent exception it is being
660   /* This entry, mips16, is here only for ISA/processor selection; do
751   /* If a 32-bit ELF file, n32 is a new-style ABI.  */
809      is MIPS16 ASE) (o)32-style ("oldabi") GPR names, and numeric FPR,
826   /* This is running out on a target machine, not in a host tool.
855 	 configuration with a 32-bit host where the MIPS target is
1028       /* We know that *options is neither NUL or a comma.  */
1142      where the value is known to be unsigned and small.  */
1162    whose value is given by UVAL.  */
1198    UVAL is the encoding of the operand (shifted into bit 0) and BASE_PC is
1210   void *is = info->stream;
1222 	  infprintf (is, "0x%x", uval);
1224 	  infprintf (is, "%d", uval);
1236 	  infprintf (is, "0x%x", uval);
1238 	  infprintf (is, "%d", uval);
1250 	infprintf (is, "0x%x", uval);
1274 	infprintf (is, ",");
1297       infprintf (is, "%d", uval);
1307 	infprintf (is, "%d", sval);
1317 	/* If one is zero use the other.  */
1319 	  infprintf (is, "%s", mips_gpr_names[reg1]);
1321 	  infprintf (is, "%s", mips_gpr_names[reg2]);
1324 	  infprintf (is, "%s or %s", mips_gpr_names[reg1],
1342 	    infprintf (is, "%s,%s",
1346 	    infprintf (is, "%s-%s,%s",
1359 		infprintf (is, "%s", mips_gpr_names[16]);
1361 		infprintf (is, "%s-%s",
1365 		infprintf (is, "%s-%s,%s",
1370 		infprintf (is, "UNKNOWN");
1376 		infprintf (is, "%s", mips_gpr_names[31]);
1378 		infprintf (is, ",%s", mips_gpr_names[31]);
1392 	    infprintf (is, "%s", mips_gpr_names[4]);
1394 	      infprintf (is, "-%s", mips_gpr_names[amask + 3]);
1401 	    infprintf (is, "%s??", sep);
1406 	    infprintf (is, "%s%s", sep, mips_gpr_names[16]);
1408 	      infprintf (is, "-%s", mips_gpr_names[smask + 15]);
1414 	    infprintf (is, "%s%s", sep, mips_gpr_names[31]);
1420 	    infprintf (is, "%s%s", sep, mips_fpr_names[0]);
1422 	      infprintf (is, "-%s", mips_fpr_names[1]);
1446 	    infprintf (is, "[%d]", vsel >> 1);
1451 	  infprintf (is, "0x%x", uval);
1464       infprintf (is, "$pc");
1473       infprintf (is, "[%d]", uval);
1477       infprintf (is, "[");
1479       infprintf (is, "]");
1484 /* Validate the arguments for INSN, which is described by OPCODE.
1598 /* Print the arguments for INSN, which is described by OPCODE.
1601    operand is for a branch or jump.  */
1610   void *is = info->stream;
1623 	  infprintf (is, "%c", *s);
1628 	  infprintf (is, "%c%c", *s, *s);
1636 	      infprintf (is,
1664 		infprintf (is, "%s", n->name);
1666 		infprintf (is, "$%d,%d", reg, sel);
1680 		  /* The include_isa_bit flag is sufficient to distinguish
1698    on using INFO.  Returns length of the instruction, in bytes, which is
1699    always INSNLEN.  BIGENDIAN must be 1 if this is big-endian code, 0 if
1700    this is little-endian code.  */
1713   void *is = info->stream;
1788 	      infprintf (is, "%s", op->name);
1793 		  infprintf (is, ".");
1800 		  infprintf (is, "\t");
1813   infprintf (is, "0x%x", word);
1829   void *is = info->stream;
1843       infprintf (is, "%c", type);
1851 	  infprintf (is, _("# internal error, undefined operand in `%s %s'"),
1883 	      infprintf (is, "%s", mips_gpr_names[4]);
1885 		infprintf (is, "-%s", mips_gpr_names[4 + nargs - 1]);
1892 	  infprintf (is, "%s%d", sep, frame_size);
1895 	    infprintf (is, ",%s", mips_gpr_names[31]);
1909 		infprintf (is, ",%s", mips_gpr_names[i == 8 ? 30 : (16 + i)]);
1914 		  infprintf (is, "-%s", mips_gpr_names[j == 8 ? 30 : (16 + j)]);
1919 	    infprintf (is, ",%s", mips_gpr_names[7]);
1921 	    infprintf (is, ",%s-%s",
1969 	      /* If this instruction is in the delay slot of a JAL/JALX
1970 		 instruction, the base address is the address of the
1971 		 JAL/JALX instruction.  If it is in the delay slot of
1972 		 a JR/JALR instruction, the base address is the address
1973 		 of the JR/JALR instruction.  This test is unreliable:
1974 		 we have no way of knowing whether the previous word is
2004 /* Check if the given address is the last word of a MIPS16 PLT entry.
2005    This word is data and depending on the value it may interfere with
2039   void *is = info->stream;
2068 	  infprintf (is, ".word\t0x%x", gotslot);
2145 	  infprintf (is, "%s", op->name);
2147 	    infprintf (is, "\t");
2202   infprintf (is, "0x%x", first);
2215   void *is = info->stream;
2247       /* This is a 32-bit microMIPS instruction.  */
2253 	  infprintf (is, "micromips 0x%x", higher);
2282 	  infprintf (is, "%s", op->name);
2286 	      infprintf (is, "\t");
2319   infprintf (is, "0x%x", insn);
2363    are single stepping, or the pc is within the disassembled function,
2383   /* FIXME: If odd address, this is CLEARLY a compressed instruction.  */