Lines Matching defs:pseudo

73 /* Indicates error if a pseudo operation was expanded after a branch.  */
76 /* If true, then warn if any pseudo operations were expanded. */
134 /* Temporary register used when expanding assembler pseudo operations. */
166 as_bad (_("Unknown temporary pseudo register"));
170 as_bad (_("Unknown temporary pseudo register"));
261 struct i860_it pseudo[3];
269 /* Check for expandable flag to produce pseudo-instructions. This
276 pseudo[i] = the_insn;
294 pseudo[0].opcode = (the_insn.opcode & 0x001f0000) | 0xe4000000;
295 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
298 pseudo[1].opcode = (the_insn.opcode & 0x03ffffff) | 0xec000000
300 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
313 pseudo[0].opcode = 0xec000000 | (the_insn.opcode & 0x03e00000)
315 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_HA);
319 pseudo[1].opcode = (the_insn.opcode & ~0x03e00000) | (atmp << 21);
320 pseudo[1].fi[0].fup = the_insn.fi[0].fup | OP_SEL_L;
333 pseudo[0].opcode = (the_insn.opcode & 0xf3e0ffff) | 0x0c000000
335 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
338 pseudo[1].opcode = (the_insn.opcode & 0xf01f0000) | 0x04000000
340 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
353 pseudo[0].opcode = (the_insn.opcode & 0x03e0ffff) | 0xd4000000
355 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
356 pseudo[0].fi[0].exp.X_add_number =
360 pseudo[1].opcode = (the_insn.opcode & 0x001f0000) | 0xd4000000
362 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
363 pseudo[1].fi[0].exp.X_add_number =
377 pseudo[0].opcode = 0xec000000 | (atmp << 16);
378 pseudo[0].fi[0].fup = (OP_IMM_S16 | OP_SEL_H);
381 pseudo[1].opcode = 0xe4000000 | (atmp << 21) | (atmp << 16);
382 pseudo[1].fi[0].fup = (OP_IMM_S16 | OP_SEL_L);
385 pseudo[2].opcode = (the_insn.opcode & ~0x0400ffff) | (atmp << 11);
386 pseudo[2].fi[0].fup = OP_IMM_S16;
395 the_insn = pseudo[0];
444 the_insn = pseudo[++i];
1137 -mwarn-expand warn if pseudo operations are expanded\n\