ELF/Arch/X86_64.cpp

50   bool deleteFallThruJmpInsn(InputSection &is, InputFile *file,
56 // This is vector of NOP instructions of sizes from 1 to 8 bytes.  The
154 // Returns the maximum size of the vector if no such relocation is found.
155 static unsigned getRelocationWithOffset(const InputSection &is,
157   unsigned size = is.relocs().size();
159     if (is.relocs()[i].offset == offset && is.relocs()[i].expr != R_NONE)
177 static bool isFallThruRelocation(InputSection &is, InputFile *file,
182   uint64_t addrLoc = is.getOutputSection()->addr + is.outSecOff + r.offset;
186   // If this jmp is a fall thru, the target offset is the beginning of the
193 // Return the jmp instruction opcode that is the inverse of the given
194 // opcode.  For example, JE inverted is JNE.
223 // following section as it is not required.  If there are two consecutive jump
237 //   10: je bar  #jne flipped to je and the jmp is deleted.
240 bool X86_64::deleteFallThruJmpInsn(InputSection &is, InputFile *file,
247   if (is.getSize() < sizeOfDirectJmpInsn)
250   // If this jmp insn can be removed, it is the last insn and the
251   // relocation is 4 bytes before the end.
252   unsigned rIndex = getRelocationWithOffset(is, is.getSize() - 4);
253   if (rIndex == is.relocs().size())
256   Relocation &r = is.relocs()[rIndex];
259   const uint8_t *secContents = is.content().data();
260   // If it is not a direct jmp instruction, there is nothing to do here.
264   if (isFallThruRelocation(is, file, nextIS, r)) {
265     // This is a fall thru and can be deleted.
268     is.drop_back(sizeOfDirectJmpInsn);
269     is.nopFiller = true;
273   // Now, check if flip and delete is possible.
276   if (is.getSize() < sizeOfDirectJmpInsn + sizeOfJmpCCInsn)
280       getRelocationWithOffset(is, (is.getSize() - sizeOfDirectJmpInsn - 4));
281   if (rbIndex == is.relocs().size())
284   Relocation &rB = is.relocs()[rbIndex];
291   if (!isFallThruRelocation(is, file, nextIS, rB))
299   is.jumpInstrMod = make<JumpInstrMod>();
300   *is.jumpInstrMod = {rB.offset - 1, jInvert, 4};
306   is.drop_back(sizeOfDirectJmpInsn);
307   is.nopFiller = true;
317   // If the max VA difference is under 2^31, GOT-generating relocations with a 32-bit range cannot overflow.
407   // The first entry holds the link-time address of _DYNAMIC. It is documented
409   // load address of the shared object (note that this is relevant for linking
420   // An x86 entry is the address of the ifunc resolver function (for -z rel).
545   // Note that ADD with RSP or R12 is converted to ADD instead of LEA
621 // opcode at that offset must be modified.  This is specifically used to relax
849     // The addend is stored in the second 64-bit word.
869   // FIXME: When PIC is disabled and foo is defined locally in the
885   // If PIC then no relaxation is available.
903     // YYY is MODRM.reg(register 2), ZZZ is MODRM.rm(register 1).
905     // 00: The operand's memory address is in reg1.
906     // 01: The operand's memory address is reg1 + a byte-sized displacement.
907     // 10: The operand's memory address is reg1 + a word-sized displacement.
908     // 11: The operand is reg1 itself.
922     // REX byte is encoded as 0100WRXB, where
923     // 0100 is 4bit fixed pattern.
924     // REX.W When 1, a 64-bit operand size is used. Otherwise, when 0, the
925     //   default operand size is used (which is 32-bit for most but not all
927     // REX.R This 1-bit value is an extension to the MODRM.reg field.
928     // REX.X This 1-bit value is an extension to the SIB.index field.
929     // REX.B This 1-bit value is an extension to the MODRM.rm field or the
941   // Logic is close to one for test instruction above, but we also
945   // Primary opcode is 0x81, opcode extension is one of:
946   // 000b = ADD, 001b is OR, 010b is ADC, 011b is SBB,
947   // 100b is AND, 101b is SUB, 110b is XOR, 111b is CMP.
981     // Instead we convert to "addr32 call foo" where addr32 is an instruction
990   // jmp doesn't return, so it is fine to use nop here, it is just a stub.
1020   // if there is X available stack space. Making X larger effectively reserves
1053 // If Intel Indirect Branch Tracking is enabled, we have to emit special PLT
1111 // indirect jump. That instruction sequence is so-called "retpoline".
1114 // is specified, all dynamic symbols are resolved at load-time. Thus, when
1115 // that option is given, we can omit code for symbol lazy resolution.