Lines Matching defs:reg
1720 int reg = -1;
1738 reg = r & RNUM_MASK;
1740 /* Convert GP reg $v0/1 to MDMX reg $v0/1! */
1741 reg = (r & RNUM_MASK) - 2;
1752 reg = r & RNUM_MASK;
1756 if (reg >= 0)
1763 *regnop = reg;
1764 return reg >= 0;
2069 insn_uses_reg (const struct mips_cl_insn *ip, unsigned int reg,
2075 reg = mips16_to_32_reg_map[reg];
2080 if (class == MIPS_GR_REG && reg == ZERO)
2095 == (reg &~ (unsigned) 1)))
2099 == (reg &~ (unsigned) 1)))
2105 && EXTRACT_OPERAND (RS, *ip) == reg)
2108 && EXTRACT_OPERAND (RT, *ip) == reg)
2114 && mips16_to_32_reg_map[MIPS16_EXTRACT_OPERAND (RX, *ip)] == reg)
2117 && mips16_to_32_reg_map[MIPS16_EXTRACT_OPERAND (RY, *ip)] == reg)
2121 == reg))
2123 if ((ip->insn_mo->pinfo & MIPS16_INSN_READ_T) && reg == TREG)
2125 if ((ip->insn_mo->pinfo & MIPS16_INSN_READ_SP) && reg == SP)
2127 if ((ip->insn_mo->pinfo & MIPS16_INSN_READ_31) && reg == RA)
2130 && MIPS16_EXTRACT_OPERAND (REGR32, *ip) == reg)
2141 reg_needs_delay (unsigned int reg)
2156 if (reg == EXTRACT_OPERAND (RT, history[0]))
2442 int i, j, reg;
2458 reg = mips16_to_32_reg_map[MIPS16_EXTRACT_OPERAND (RX, history[i])];
2460 reg = EXTRACT_OPERAND (RD, history[i]);
2463 if (insn != NULL && insn_uses_reg (insn, reg, MIPS_GR_REG))
2468 if (insn_uses_reg (&history[j], reg, MIPS_GR_REG))
3856 * if reg is less than the immediate expression.
3859 set_at (int reg, int unsignedp)
3865 AT, reg, BFD_RELOC_LO16);
3869 macro_build (NULL, unsignedp ? "sltu" : "slt", "d,v,t", AT, reg, AT);
3969 load_register (int reg, expressionS *ep, int dbl)
3987 macro_build (ep, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16);
3994 macro_build (ep, "ori", "t,r,i", reg, 0, BFD_RELOC_LO16);
4000 macro_build (ep, "lui", "t,u", reg, BFD_RELOC_HI16);
4002 macro_build (ep, "ori", "t,r,i", reg, reg, BFD_RELOC_LO16);
4015 macro_build (ep, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16);
4052 macro_build (&lo32, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16);
4057 macro_build (&lo32, "lui", "t,u", reg, BFD_RELOC_HI16);
4059 macro_build (&lo32, "ori", "t,r,i", reg, reg, BFD_RELOC_LO16);
4093 macro_build (&tmp, "ori", "t,r,i", reg, 0, BFD_RELOC_LO16);
4095 reg, reg, (shift >= 32) ? shift - 32 : shift);
4142 macro_build (&tmp, "addiu", "t,r,j", reg, 0, BFD_RELOC_LO16);
4147 reg, reg, (bit >= 32) ? bit - 32 : bit);
4150 reg, reg, (shift >= 32) ? shift - 32 : shift);
4159 load_register (reg, &hi32, 0);
4160 freg = reg;
4166 macro_build (NULL, "dsll32", "d,w,<", reg, freg, 0);
4167 freg = reg;
4176 macro_build (&lo32, "lui", "t,u", reg, BFD_RELOC_HI16);
4177 macro_build (NULL, "dsrl32", "d,w,<", reg, reg, 0);
4183 macro_build (NULL, "dsll", "d,w,<", reg, freg, 16);
4184 freg = reg;
4188 macro_build (&mid16, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16);
4189 macro_build (NULL, "dsll", "d,w,<", reg, reg, 16);
4190 freg = reg;
4193 macro_build (&lo32, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16);
4206 load_address (int reg, expressionS *ep, int *used_at)
4217 load_register (reg, ep, HAVE_64BIT_ADDRESSES);
4224 addiu $reg,$gp,<sym> (BFD_RELOC_GPREL16)
4226 lui $reg,<sym> (BFD_RELOC_HI16_S)
4227 addiu $reg,$reg,<sym> (BFD_RELOC_LO16)
4231 lui $reg,<sym> (BFD_RELOC_MIPS_HIGHEST)
4233 daddiu $reg,<sym> (BFD_RELOC_MIPS_HIGHER)
4235 dsll32 $reg,0
4236 daddu $reg,$reg,$at
4240 lui $reg,<sym> (BFD_RELOC_MIPS_HIGHEST)
4241 daddiu $reg,<sym> (BFD_RELOC_MIPS_HIGHER)
4242 dsll $reg,16
4243 daddiu $reg,<sym> (BFD_RELOC_HI16_S)
4244 dsll $reg,16
4245 daddiu $reg,<sym> (BFD_RELOC_LO16)
4255 macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg,
4262 macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_HIGHEST);
4264 macro_build (ep, "daddiu", "t,r,j", reg, reg,
4267 macro_build (NULL, "dsll32", "d,w,<", reg, reg, 0);
4268 macro_build (NULL, "daddu", "d,v,t", reg, reg, AT);
4273 macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_HIGHEST);
4274 macro_build (ep, "daddiu", "t,r,j", reg, reg,
4276 macro_build (NULL, "dsll", "d,w,<", reg, reg, 16);
4277 macro_build (ep, "daddiu", "t,r,j", reg, reg, BFD_RELOC_HI16_S);
4278 macro_build (NULL, "dsll", "d,w,<", reg, reg, 16);
4279 macro_build (ep, "daddiu", "t,r,j", reg, reg, BFD_RELOC_LO16);
4291 macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg,
4295 macro_build_lui (ep, reg);
4297 reg, reg, BFD_RELOC_LO16);
4307 lw $reg,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
4309 lw $reg,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
4311 addiu $reg,$reg,<sym> (BFD_RELOC_LO16)
4315 lw $reg,<sym+cst>($gp) (BFD_RELOC_MIPS_GOT_DISP)
4325 macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
4331 reg, reg, BFD_RELOC_LO16);
4335 macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
4344 macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
4349 macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
4359 reg, reg, BFD_RELOC_LO16);
4369 lui $reg,<sym> (BFD_RELOC_MIPS_GOT_HI16)
4370 addu $reg,$reg,$gp
4371 lw $reg,<sym>($reg) (BFD_RELOC_MIPS_GOT_LO16)
4374 lw $reg,<sym>($gp) (BFD_RELOC_MIPS_GOT16)
4376 addiu $reg,$reg,<sym> (BFD_RELOC_LO16)
4380 lw $reg,<sym>($gp) (BFD_RELOC_MIPS_GOT_PAGE)
4381 addiu $reg,$reg,<sym> (BFD_RELOC_MIPS_GOT_OFST)
4388 macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_GOT_HI16);
4390 reg, reg, mips_gp_register);
4392 reg, BFD_RELOC_MIPS_GOT_LO16, reg);
4398 macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
4404 macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
4406 macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
4415 macro_build (ep, "lui", "t,u", reg, BFD_RELOC_MIPS_GOT_HI16);
4417 reg, reg, mips_gp_register);
4419 reg, BFD_RELOC_MIPS_GOT_LO16, reg);
4429 macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
4432 macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
4441 macro_build (&ex, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
5819 lw $reg,<sym>($gp) (BFD_RELOC_MIPS_GOT_PAGE)
5820 addiu $reg,$reg,<sym> (BFD_RELOC_MIPS_GOT_OFST)
7179 Eg. 4 cycles if load coproc reg from memory, 1 if in cache, etc.
7815 sreg = (ip->insn_opcode >> 11) & 0x1f; /* floating reg */
7816 dreg = (ip->insn_opcode >> 06) & 0x1f; /* floating reg */
13029 int reg;
13044 reg = tc_get_register (0);
13065 mips_gp_register, reg);
13431 int reg;
13442 reg = tc_get_register (0);
13443 macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", reg, reg, mips_gp_register);
13535 unsigned int reg;
13538 if (! reg_lookup (&input_line_pointer, RWARN | RTYPE_NUM | RTYPE_GP, ®))
13539 reg = 0;
13542 mips_frame_reg = reg != 0 ? reg : SP;
13546 return reg;
15472 unsigned int reg;
15474 if (reg_lookup (®name, RTYPE_GP | RTYPE_NUM, ®))
15475 regnum = reg;