gas/config/tc-ia64.c

38 	<reg>.safe_across_calls and any other DV-related directives I don't
987 ar_is_only_in_integer_unit (int reg)
989   reg -= REG_AR;
990   return reg >= 64 && reg <= 111;
996 ar_is_only_in_memory_unit (int reg)
998   reg -= REG_AR;
999   return reg >= 0 && reg <= 47;
1325 output_P3_format (f, rtype, reg)
1328      int reg;
1332   reg = (reg & 0x7f);
1375   bytes[1] = (((r & 1) << 7) | reg);
1679 format_ab_reg (ab, reg)
1681      int reg;
1685   reg = (reg & 0x1f);
1686   ret = (ab << 5) | reg;
1691 output_X1_format (f, rtype, ab, reg, t, w1)
1694      int ab, reg;
1707   bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1714 output_X2_format (f, ab, reg, x, y, treg, t)
1716      int ab, reg;
1723   bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1730 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1734      int ab, reg;
1748   bytes[2] = format_ab_reg (ab, reg);
1755 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1758      int ab, reg;
1766   bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1853 output_prologue_gr (saved_mask, reg)
1855      unsigned int reg;
1860   ptr->r.record.r.grsave = reg;
2083 output_gr_gr (mask, reg)
2085      unsigned int reg;
2091   ptr->r.record.p.r.gr = reg;
2161 output_br_gr (mask, reg)
2163      unsigned int reg;
2169   ptr->r.record.p.r.gr = reg;
2479 output_spill_psprel (ab, reg, offset, predicate)
2481      unsigned int reg;
2487   ptr->r.record.x.reg = reg;
2494 output_spill_sprel (ab, reg, offset, predicate)
2496      unsigned int reg;
2502   ptr->r.record.x.reg = reg;
2509 output_spill_reg (ab, reg, targ_reg, xy, predicate)
2511      unsigned int reg;
2518   ptr->r.record.x.reg = reg;
2519   ptr->r.record.x.where.reg = targ_reg;
2686 			ptr->r.record.x.reg, ptr->r.record.x.t,
2691 			ptr->r.record.x.reg, ptr->r.record.x.t,
2695       output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2697 			ptr->r.record.x.where.reg, ptr->r.record.x.t);
2701 			ptr->r.record.x.ab, ptr->r.record.x.reg,
2706 			ptr->r.record.x.ab, ptr->r.record.x.reg,
2711 			ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2712 			ptr->r.record.x.xy, ptr->r.record.x.where.reg,
2772 	1: instruction saves next fp reg
2773 	2: instruction saves next general reg
2774 	3: instruction saves next branch reg */
3205   unsigned int reg = e->X_add_number;
3210     reg = REG_GR; /* Anything invalid is good here.  */
3212   if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
3215       *regp = reg - REG_GR;
3217   else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3218 	   || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
3221       *regp = reg - REG_FR;
3223   else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
3226       *regp = reg - REG_BR;
3231       switch (reg)
3260   unsigned int reg = e->X_add_number;
3265     reg = REG_GR; /* Anything invalid is good here.  */
3267   if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
3270       *regp = reg - REG_GR;
3272   else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
3275       *regp = reg - REG_FR;
3277   else if (reg >= REG_BR && reg <= (REG_BR + 7))
3280       *regp = reg - REG_BR;
3466   unsigned reg;
3473   reg = e.X_add_number - REG_GR;
3474   if (e.X_op != O_register || reg > 127)
3477       reg = 0;
3481     add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3482   else if (reg != unwind.prologue_gr
3528   /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'.  */
3649   unsigned int qp, ab, reg;
3664   convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
3666   add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
3905   unsigned reg;
3911   reg = e.X_add_number - REG_BR;
3912   if (e.X_op != O_register || reg > 7)
3915       reg = 0;
3917   add_unwind_entry (output_rp_br (reg), 0);
3941   /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'.  */
4046       unsigned reg;
4050       reg = e.X_add_number - REG_GR;
4051       if (e.X_op != O_register || reg > 127)
4054 	  reg = 0;
4056       else if (reg > 128U - n)
4059 	  reg = 0;
4061       add_unwind_entry (output_gr_gr (grmask, reg), 0);
4112       unsigned reg;
4116       reg = e.X_add_number - REG_GR;
4117       if (e.X_op != O_register || reg > 127)
4120 	  reg = 0;
4122       else if (reg > 128U - n)
4125 	  reg = 0;
4127       add_unwind_entry (output_br_gr (brmask, reg), 0);
4196   unsigned int qp, ab, xy, reg, treg;
4210   convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
4218   add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
4227   unsigned int qp, ab, reg;
4248   convert_expr_to_ab_reg (&e, &ab, &reg, po, 1 + pred);
4261     add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
4263     add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
5112 /* .reg.val <regname>,value */
5118   expressionS reg;
5120   expression_and_evaluate (&reg);
5121   if (reg.X_op != O_register)
5134       int regno = reg.X_add_number;
5554     { "reg.val", dot_reg_val, 0 },
8362      int type;                         /* is this a DV chk or a DV reg? */
9311 		  int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9312 		  if (reg >= min && reg <= max)
9329 		  int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9330 		  if (reg >= min && reg <= max)