Lines Matching defs:variant

532   /* Which architecture variant provides this instruction.  */
4516 /* Record the relocation type (always the ALU variant here). */
7577 /* VFP instructions. In a logical order: SP variant first, monad
8276 holds variant (1).
9369 /* Definitely a 32-bit variant. */
12423 /* Only encodes the 'U present' variant of the instruction.
12557 /* Maximum shift variant. */
13963 OT_odd_infix_unc, /* This is the unconditional variant of an
13966 this variant will accept a suffix. */
13982 to encode each conditional variant as a literal string in the opcode
14224 arm_feature_set variant;
14226 variant = cpu_variant;
14228 if (!ARM_CPU_HAS_FEATURE (variant, arm_arch_t2))
14229 ARM_CLEAR_FEATURE (variant, variant, fpu_any_hard);
14233 && !ARM_CPU_HAS_FEATURE (variant, *opcode->tvariant)))
14245 if (!ARM_CPU_HAS_FEATURE (variant, arm_ext_v6t2) && !inst.size_req)
14729 /* The normal sort of mnemonic; has a Thumb variant; takes a conditional suffix. */
14741 /* Second most common sort of mnemonic: has a Thumb variant, takes a conditional
14758 /* Mnemonic with a conditional infix in an unusual place. Each and every variant has to
15088 BLX(2). Only this variant has conditional execution. */
16083 /* Special case. Types S8 S16 S32 U8 U16 U32. Handles max shift variant. */
16085 /* CVT with optional immediate for fixed-point variant. */
16801 /* Force misaligned offsets to 32-bit variant. */
16851 /* Force misaligned targets to 32-bit variant. */
19578 /* Set the cpu variant based on the command-line options. We prefer