Copy stable/10@r272459 to releng/10.1 as part of
the 10.1-RELEASE process.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

MFC r263957:
Increase the number of TX DMA segments from 32 to 35. It turned
out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

Copy head (r256279) to stable/10 as part of the 10.0-RELEASE cycle.

Approved by: re (implicit)
Sponsored by: The FreeBSD Foundation

Mechanically substitute flags from historic mbuf allocator with
malloc(9) flags in sys/dev.

Switch some PCI register reads from using magic numbers to using the names
defined in pcireg.h

MFC after: 1 week

Align the PCI Express #defines with the style used for the PCI-X
#defines. This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.

This is a mostly mechanical rename:
s/PCIR_EXPRESS_/PCIER_/g
s/PCIM_EXP_/PCIEM_/g
s/PCIM_LINK_/PCIEM_LINK_/g

When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.

Discussed with: jhb
MFC after: 1 week

Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by: Karim (fodillemlinkarimi <> gmail dot com)

Disable PHY hibernation until I get more detailed hibernation
programming secret. The PHY would go into sleep state when it
detects no established link and it will re-establish link when the
cable is plugged in. Previously it failed to re-establish link
when the cable is plugged in such that it required to manually down
and up the interface again to make it work. This came from
incorrectly programmed hibernation parameters. According to
Atheros, each PHY chip requires different configuration for
hibernation and different vendor has different settings for the
same chip.
Disabling hibernation may consume more power but establishing link
looks more important than saving power.
Special thanks to Atheros for giving me instructions that disable
hibernation.

MFC after: 1 week
Approved by: re (kib)

Fix typo.

Submitted by: brad at OpenBSD

- Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
it might provide useful for debugging). For most mii(4) drivers it
was unclear whether the PHYs driven by them actually support
loopback or not. Moreover, typically loopback mode also needs to
be activated on the MAC, which none of the Ethernet drivers using
mii(4) implements. Given that loopback media has no real use (and
obviously hardly had a chance to actually work) besides for driver
development (which just loopback mode should be sufficient for
though, i.e one doesn't necessary need support for loopback media)
support for it is just dropped as both NetBSD and OpenBSD already
did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
instead of discrete function pointers, and extend this to include
a "reset" entry point. Make sure any PHY-specific reset routine is
always used, and provide one for lxtphy(4) which disables MII
interrupts (as is done for a few other PHYs we have drivers for).
This includes changing NIC drivers which previously just called the
generic mii_phy_reset() to now actually call the PHY-specific reset
routine, which might be crucial in some cases. While at it, the
redundant checks in these NIC drivers for mii->mii_instance not being
zero before calling the reset routines were removed because as soon
as one PHY driver attaches mii->mii_instance is incremented and we
hardly can end up in their media change callbacks etc if no PHY driver
has attached as mii_attach() would have failed in that case and not
attach a miibus(4) instance.
Consequently, NIC drivers now no longer should call mii_phy_reset()
directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
The purpose of that function is to perform the common steps to attach
a PHY driver instance and to hook it up to the miibus(4) instance and to
optionally also handle the probing, addition and initialization of the
supported media. So all a PHY driver without any special requirements
has to do in its bus attach method is to call mii_phy_dev_attach()
along with PHY-specific MIIF_* flags, a pointer to its PHY functions
and the add_media set to one. All PHY drivers were updated to take
advantage of mii_phy_dev_attach() as appropriate. Along with these
changes the capability mask was added to the mii_softc structure so
PHY drivers taking advantage of mii_phy_dev_attach() but still
handling media on their own do not need to fiddle with the MII attach
arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
structure. Several PHY drivers require this information also after
attaching and previously had to wrap their own softc around mii_softc.
NetBSD/OpenBSD also keep track of the model and revision on their
mii_softc structure. All PHY drivers were updated to take advantage
as appropriate.
- Convert the mebers of the MII data structure to unsigned where
appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
when mapping an OUI to the MII ID registers. All PHY drivers and
miidevs where changed as necessary. Actually this now again allows to
largely share miidevs with NetBSD, which fixed this problem already
9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
weren't explicitly converted to support flow control before. It's
unclear whether flow control actually works with these but typically
it should and their net behavior should be more correct with these
changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from: NetBSD (partially)
Reviewed by: yongari (earlier version), silence on arch@ and net@

Do a sweep of the tree replacing calls to pci_find_extcap() with calls to
pci_find_cap() instead.

alc_rev was used without initialization such that it failed to
apply AR8152 v1.0 specific initialization code. Fix this bug by
explicitly reading PCI device revision id via PCI accessor.

Reported by: Gabriel Linder ( linder.gabriel <> gmail dot com )

Fix logic error. Due to the bug, it incorrectly checked TXQ status
which in turn can leave TXQ active.

Submitted by: Brad ( brad <> comstyle dot com )
MFC after: 3 days

Correct wrong definition of PM timer mask and adjust L1/PM timer
value. While I'm here enable all clocks before initializing
controller. This change should fix lockup issue seen on AR8152
v1.1 PCIe Fast Ethernet controller.

PR: kern/154076
MFC after: 3 days

- Move ether_ifdetach() earlier and remove now-unneeded IN_DETACH flag.
- Expand locking in interrupt handler.

Reviewed by: yongari

Make sure to invoke unlocked foo_start since the taskqueue does not
hold a driver lock. This should fix a regression introduced in
r216925.

PR: kern/153769

sysctl(9) cleanup checkpoint: amd64 GENERIC builds cleanly.

Commit the rest of the devices.

Add a 'locked' variant of the foo_start() routine and call it directly
from interrupt handlers and watchdog routines instead of queueing a task
to call foo_start().

Reviewed by: yongari
MFC after: 1 month

Remove unecessary and clearly wrong usage of atomic(9).

Reported by: avg, jhb, attilio

Enable ethernet flow-control on all alc(4) controllers. This change
should reduce a lot of dropped frames under high network load.

Don't bother to enable ASPM L1 to save more power. Even though I am
not able to trigger the issue with sample boards, some users seems
to suffer from freeze/lockup when system is booted without UTP cable
plugged in. I'm not sure whether this is BIOS issue or controller
bug. This change fixes AR8132 lockup issue seen on EEE PC.

Reported by: kmoore
Tested by: kmoore

Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
addresses; we now let mii_attach() only probe the PHY at the desired
address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
off from, partly even based on grabbing and using the softc of the
parent; we now pass these flags down from the NIC to the PHY drivers
via mii_attach(). This got us rid of all such hacks except those of
brgphy() in combination with bce(4) and bge(4), which is way beyond
what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by: jhb, yongari

Make sure to not use stale ip/tcp header pointers. The ip/tcp
header parser uses m_pullup(9) to get access to mbuf chain.
m_pullup(9) can allocate new mbuf chain and free old one if the
space left in the mbuf chain is not enough to hold requested
contiguous bytes. Previously drivers can use stale ip/tcp header
pointer if m_pullup(9) returned new mbuf chain.

Reported by: Andrew Boyer (aboyer <> averesystems dot com)
MFC after: 10 days

Backout r204230. TX mbuf parser for VLAN is still required to
enable TX checksum offloading if VLAN hardware tagging is disabled.

status bits should be &'ed against status to be really functional.

Reported by: Jike Song
Reviewed by: yongari
MFC after: 1 week

Make sure to disable RX MAC in alc_stop_mac(). Previously there
was a logic error which it always enabled RX MAC.

Add support for Atheros AR8151/AR8152 PCIe gigabit/fast ethernet
controller. These controllers are known as L1D(AR8151) and
L2CB/B2(AR8152). This change adds supports for the following
controllers.
o AR8151 v1.0(L1D) gigabit ethernet controller
o AR8151 v2.0(L1D) gigabit ethernet controller
o AR8152 v1.1(L2CB) fast ethernet controller
o AR8152 v2.0(L2CB2) fast ethernet controller
These controllers have the same feature of AR8131/AR8132 and
support improved power saving control. The user visible change at
this moment is reduced jumbo frame size from 9KB to 6KB. Many
thanks to Atheros for continuing to support FreeBSD.

HW donated by: Atheros Communications, Inc.

Cache PCIY_PMG and PCIY_EXPRESS capability pointer to softc and use
it instead of calling pci_find_extcap().

Remove unnecessary assignment.

Always disable ASPM L0s and enable L1 before entering into WOL
suspend state. Also disable master clock after PHY power down,
this is supposed to save more power. The master clock should be
enabled if WOL is active.

Do not touch CMB TX threshold register when CMB is not used.
Note, alc(4) does not use CMB at all due to silicon bug.

Controller does not seem to support more than 1024 bytes DMA burst.
Limit DMA burst size to be less than or equal to 1024 bytes.

Reduce Tx interrupt moderation timer from 50ms to 1ms. The default
value resulted in poor performance for UDP packets. With this
change, UDP bulk transfer performance is more than 940Mbps.

While I'm here fix a wrong register definition.

With r206844, CSUM_TCP is also set for CSUM_TSO case. Modify
drivers to take into account for the change. Basically CSUM_TSO
should be checked before checking CSUM_TCP.

Remove Tx mbuf parsing code for VLAN in TSO path. Controller does
not support TSO over VLAN if VLAN hardware tagging is disabled so
there is no need to check VLAN here.

Add TSO support on VLANs. Also make sure to update TSO capability
whenever jumbo frame is configured.
While I'm here remove unnecessary check of VLAN hardware checksum
offloading. vlan(4) already takes care of this.

Fix multicast handling. All Atheros controllers use big-endian form
in computing multicast hash.

PR: kern/139137

For AR8132 fast ethernet controller, do not report 1000baseT
capability to mii(4). Even though AR8132 uses the same model/
revision number of F1 gigabit PHY, the PHY has no ability to
establish 1000baseT link. I have no idea why Atheros use the same
device/model id for this PHY.
With this change atphy(4) does not report 1000baseT media
capability and manual 1000baseT configuration is also disabled
which is more desirable behavior for 10/100Mbps PHY.

Don't try to power down PHY when alc(4) failed to map the device.
This fixes system crash when mapping alc(4) device failed in device
attach.

Reported by: Jim < stapleton.41 <> gmail DOT com >
MFC after: 3 days

Free allocated Rx ring dma memory/tags.

Reviewed by: yongari@
Approved by: re (kib)

Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs. This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.

For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.

Approved by: re (kib)
MFC after: 6 weeks

Add alc(4), a driver for Atheros AR8131/AR8132 PCIe ethernet
controller. These controllers are also known as L1C(AR8131) and
L2C(AR8132) respectively. These controllers resembles the first
generation controller L1 but usage of different descriptor format
and new register mappings over L1 register space requires a new
driver. There are a couple of registers I still don't understand
but the driver seems to have no critical issues for performance and
stability. Currently alc(4) supports the following hardware
features.
o MSI
o TCP Segmentation offload
o Hardware VLAN tag insertion/stripping
o Tx/Rx interrupt moderation
o Hardware statistics counters(dev.alc.%d.stats)
o Jumbo frame
o WOL
AR8131/AR8132 also supports Tx checksum offloading but I disabled
it due to stability issues. I'm not sure this comes from broken
sample boards or hardware bugs. If you know your controller works
without problems you can still enable it. The controller has a
silicon bug for Rx checksum offloading, so the feature was not
implemented.
I'd like to say big thanks to Atheros. Atheros kindly sent sample
boards to me and answered several questions I had.

HW donated by: Atheros Communications, Inc.