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asm.h (204557) asm.h (206717)
1/* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
2
3/*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell.

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28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
35 * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
1/* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
2
3/*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell.

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28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
35 * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
36 * $FreeBSD: head/sys/mips/include/asm.h 204557 2010-03-02 07:27:30Z imp $
36 * $FreeBSD: head/sys/mips/include/asm.h 206717 2010-04-17 01:17:31Z jmallett $
37 */
38
39/*
40 * machAsmDefs.h --
41 *
42 * Macros used when writing assembler programs.
43 *
44 * Copyright (C) 1989 Digital Equipment Corporation.

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93#ifdef GPROF
94#define MCOUNT _KERN_MCOUNT
95#else
96#define MCOUNT
97#endif
98
99#define _C_LABEL(x) x
100
37 */
38
39/*
40 * machAsmDefs.h --
41 *
42 * Macros used when writing assembler programs.
43 *
44 * Copyright (C) 1989 Digital Equipment Corporation.

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93#ifdef GPROF
94#define MCOUNT _KERN_MCOUNT
95#else
96#define MCOUNT
97#endif
98
99#define _C_LABEL(x) x
100
101/*
102 * Endian-independent assembly-code aliases for unaligned memory accesses.
103 */
104#if BYTE_ORDER == LITTLE_ENDIAN
105#define LWLO lwl
106#define LWHI lwr
107#define SWLO swl
108#define SWHI swr
109#endif
110
111#if BYTE_ORDER == BIG_ENDIAN
112#define LWLO lwr
113#define LWHI lwl
114#define SWLO swr
115#define SWHI swl
116#endif
117
118#ifdef USE_AENT
119#define AENT(x) \
120 .aent x, 0
121#else
122#define AENT(x)
123#endif
124
125/*

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301 .text
302
303#define ASMSTR(str) \
304 .asciiz str; \
305 .align 3
306
307/*
308 * Call ast if required
101#ifdef USE_AENT
102#define AENT(x) \
103 .aent x, 0
104#else
105#define AENT(x)
106#endif
107
108/*

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284 .text
285
286#define ASMSTR(str) \
287 .asciiz str; \
288 .align 3
289
290/*
291 * Call ast if required
292 *
293 * XXX Do we really need to disable interrupts?
309 */
310#define DO_AST \
31144: \
294 */
295#define DO_AST \
29644: \
312 PTR_LA s0, _C_LABEL(disableintr) ;\
313 jalr s0 ;\
314 nop ;\
315 move a0, v0 ;\
297 mfc0 t0, MIPS_COP_0_STATUS ;\
298 and a0, t0, MIPS_SR_INT_IE ;\
299 xor t0, a0, t0 ;\
300 mtc0 t0, MIPS_COP_0_STATUS ;\
301 COP0_SYNC ;\
316 GET_CPU_PCPU(s1) ;\
302 GET_CPU_PCPU(s1) ;\
317 lw s3, PC_CURPCB(s1) ;\
318 lw s1, PC_CURTHREAD(s1) ;\
303 PTR_L s3, PC_CURPCB(s1) ;\
304 PTR_L s1, PC_CURTHREAD(s1) ;\
319 lw s2, TD_FLAGS(s1) ;\
320 li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
321 and s2, s0 ;\
305 lw s2, TD_FLAGS(s1) ;\
306 li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
307 and s2, s0 ;\
322 PTR_LA s0, _C_LABEL(restoreintr) ;\
323 jalr s0 ;\
324 nop ;\
308 mfc0 t0, MIPS_COP_0_STATUS ;\
309 or t0, a0, t0 ;\
310 mtc0 t0, MIPS_COP_0_STATUS ;\
311 COP0_SYNC ;\
325 beq s2, zero, 4f ;\
326 nop ;\
327 PTR_LA s0, _C_LABEL(ast) ;\
328 jalr s0 ;\
329 PTR_ADDU a0, s3, U_PCB_REGS ;\
312 beq s2, zero, 4f ;\
313 nop ;\
314 PTR_LA s0, _C_LABEL(ast) ;\
315 jalr s0 ;\
316 PTR_ADDU a0, s3, U_PCB_REGS ;\
330 j 44b ;\
317 j 44b ;\
331 nop ;\
3324:
333
334
335/*
336 * XXX retain dialects XXX
337 */
338#define ALEAF(x) XLEAF(x)

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378#endif
379#ifndef _KERNEL
380#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
381#endif
382#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
383#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
384
385/*
318 nop ;\
3194:
320
321
322/*
323 * XXX retain dialects XXX
324 */
325#define ALEAF(x) XLEAF(x)

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365#endif
366#ifndef _KERNEL
367#define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
368#endif
369#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
370#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
371
372/*
373 * Endian-independent assembly-code aliases for unaligned memory accesses.
374 */
375#if _BYTE_ORDER == _LITTLE_ENDIAN
376# define LWHI lwr
377# define LWLO lwl
378# define SWHI swr
379# define SWLO swl
380# if SZREG == 4
381# define REG_LHI lwr
382# define REG_LLO lwl
383# define REG_SHI swr
384# define REG_SLO swl
385# else
386# define REG_LHI ldr
387# define REG_LLO ldl
388# define REG_SHI sdr
389# define REG_SLO sdl
390# endif
391#endif
392
393#if _BYTE_ORDER == _BIG_ENDIAN
394# define LWHI lwl
395# define LWLO lwr
396# define SWHI swl
397# define SWLO swr
398# if SZREG == 4
399# define REG_LHI lwl
400# define REG_LLO lwr
401# define REG_SHI swl
402# define REG_SLO swr
403# else
404# define REG_LHI ldl
405# define REG_LLO ldr
406# define REG_SHI sdl
407# define REG_SLO sdr
408# endif
409#endif
410
411/*
386 * While it would be nice to be compatible with the SGI
387 * REG_L and REG_S macros, because they do not take parameters, it
388 * is impossible to use them with the _MIPS_SIM_ABIX32 model.
389 *
390 * These macros hide the use of mips3 instructions from the
391 * assembler to prevent the assembler from generating 64-bit style
392 * ABI calls.
393 */
394#if _MIPS_SZPTR == 32
395#define PTR_ADD add
396#define PTR_ADDI addi
397#define PTR_ADDU addu
398#define PTR_ADDIU addiu
399#define PTR_SUB add
400#define PTR_SUBI subi
401#define PTR_SUBU subu
402#define PTR_SUBIU subu
403#define PTR_L lw
404#define PTR_LA la
412 * While it would be nice to be compatible with the SGI
413 * REG_L and REG_S macros, because they do not take parameters, it
414 * is impossible to use them with the _MIPS_SIM_ABIX32 model.
415 *
416 * These macros hide the use of mips3 instructions from the
417 * assembler to prevent the assembler from generating 64-bit style
418 * ABI calls.
419 */
420#if _MIPS_SZPTR == 32
421#define PTR_ADD add
422#define PTR_ADDI addi
423#define PTR_ADDU addu
424#define PTR_ADDIU addiu
425#define PTR_SUB add
426#define PTR_SUBI subi
427#define PTR_SUBU subu
428#define PTR_SUBIU subu
429#define PTR_L lw
430#define PTR_LA la
431#define PTR_LI li
405#define PTR_S sw
406#define PTR_SLL sll
407#define PTR_SLLV sllv
408#define PTR_SRL srl
409#define PTR_SRLV srlv
410#define PTR_SRA sra
411#define PTR_SRAV srav
412#define PTR_LL ll

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419#define PTR_ADDU daddu
420#define PTR_ADDIU daddiu
421#define PTR_SUB dadd
422#define PTR_SUBI dsubi
423#define PTR_SUBU dsubu
424#define PTR_SUBIU dsubu
425#define PTR_L ld
426#define PTR_LA dla
432#define PTR_S sw
433#define PTR_SLL sll
434#define PTR_SLLV sllv
435#define PTR_SRL srl
436#define PTR_SRLV srlv
437#define PTR_SRA sra
438#define PTR_SRAV srav
439#define PTR_LL ll

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446#define PTR_ADDU daddu
447#define PTR_ADDIU daddiu
448#define PTR_SUB dadd
449#define PTR_SUBI dsubi
450#define PTR_SUBU dsubu
451#define PTR_SUBIU dsubu
452#define PTR_L ld
453#define PTR_LA dla
454#define PTR_LI dli
427#define PTR_S sd
428#define PTR_SLL dsll
429#define PTR_SLLV dsllv
430#define PTR_SRL dsrl
431#define PTR_SRLV dsrlv
432#define PTR_SRA dsra
433#define PTR_SRAV dsrav
434#define PTR_LL lld

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760 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \
761 DYNAMIC_STATUS_MASK(sr,scratch1)
762#else
763#define DYNAMIC_STATUS_MASK(sr,scratch)
764#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
765#endif
766
767#define GET_CPU_PCPU(reg) \
455#define PTR_S sd
456#define PTR_SLL dsll
457#define PTR_SLLV dsllv
458#define PTR_SRL dsrl
459#define PTR_SRLV dsrlv
460#define PTR_SRA dsra
461#define PTR_SRAV dsrav
462#define PTR_LL lld

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788 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \
789 DYNAMIC_STATUS_MASK(sr,scratch1)
790#else
791#define DYNAMIC_STATUS_MASK(sr,scratch)
792#define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
793#endif
794
795#define GET_CPU_PCPU(reg) \
768 lw reg, _C_LABEL(pcpup);
796 PTR_L reg, _C_LABEL(pcpup);
769
770/*
771 * Description of the setjmp buffer
772 *
773 * word 0 magic number (dependant on creator)
774 * 1 RA
775 * 2 S0
776 * 3 S1

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798/*
799 * Description of the setjmp buffer
800 *
801 * word 0 magic number (dependant on creator)
802 * 1 RA
803 * 2 S0
804 * 3 S1

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